Fixed TMR0 and how STATUS is affected on bank1

2022-05-03 19:56:59 +02:00
parent 03cc7b3afd
commit a9c63d5603
2 changed files with 8 additions and 1 deletions
--- a/bin/Model/Microcontroller/RAM.class
+++ b/bin/Model/Microcontroller/RAM.class
--- a/src/Model/Microcontroller/RAM.java
+++ b/src/Model/Microcontroller/RAM.java
@@ -167,7 +167,14 @@ public class Ram {
                            bank1[2] = value;
                        }break;
                        case 3: {
-                            bank1[3] = value;
+                            if (bStatusAffected) {
+                                int iStatus_Lower = get_STATUS() & 0b111;
+                                int iSTATUS_Upper = value & 0b11111000;
+                                int iNewSTATUS = iSTATUS_Upper | iStatus_Lower;
+                                set_STATUS(iNewSTATUS);
+                            } else {
+                                set_STATUS(value);
+                            } 
                        }break;
                        case 4: {
                            bank1[4] = value;